Lattice Semiconductor
CSIX Level 1 IP Core User’s Guide
Interface Timing and Electrical Speci?cations
CSIX Ports
The core’s CSIX ports are characterized to operate at 100MHz. Incoming signals are sampled on the rising edge of
the CSIX input clock. Outgoing signals are clocked on the rising edge of the outgoing CSIX clock. The instantiated
I/O buffers for the CSIX ports are compatible with LVCMOS and HSTL levels. Detailed timing and electrical speci?-
cations are shown in the paragraphs below.
The following ?gure shows a 64-byte payload arriving at the inbound CSIX interface. Note that the frame is actually
72 bytes long with header and vertical parity added.
Figure 2. CSIX Inbound Frame Transfer
c6_clk_in_N_ext
c6_parity_in_N_ext
c6_sof_in_N_ext
c6_data_in_N_ext[31:0]
1,2,3
5,6,7
65,66,
67,68
69,70,
71,72
The AC timing speci?cations for the inbound CSIX port are as follows:
Figure 3. CSIX Inbound AC Timing Speci?cations
tclk_period
c6_clk_in_N_ext
t_setup
c6_signal_in_N_ext
t_hold
Name
tclk_freq
tclk_period
t_setup
t_hold
Description
Clock frequency
Clock period
Setup time to rising edge of clock
Hold time to rising edge of clock
Min.
10ns
1.5ns
0ns
Max.
100MHz
The DC electrical speci?cations for the inbound CSIX port are as follows:
Name
V DDIO
V IH
V IL
Description
I/O supply voltage
V IN high threshold
V IN low threshold
Min.
2.3V
2.0V
-0.5V
Typ.
2.5V
Max.
2.7V
V DDIO + 0.3V
0.8V
The following ?gure shows a 64-byte payload leaving the outbound CSIX interface. Note that the frame is actually
72 bytes long with header and vertical parity added.
14
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相关代理商/技术参数
CSIX-PI40-O4-N1 功能描述:输入/输出控制器接口集成电路 CSIX to PI40 RoHS:否 制造商:Silicon Labs 产品: 输入/输出端数量: 工作电源电压: 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:QFN-64 封装:Tray
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CSJ-23 功能描述:EXTRACTION TOOL FOR SCS RoHS:否 类别:工具 >> 插入,抽取 系列:* 标准包装:1 系列:* 其它名称:0011-03-00080011-03-0008-E00110300080011030008-E11-03-0008-E1103000811030008-EQ4729393AT0980176A
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CSJ32C3 制造商:未知厂家 制造商全称:未知厂家 功能描述:HC-49/US SMD Microprocessor Crystals
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